1. Field of the Invention
The present invention relates to the field of high speed digital circuits, in particular, high speed digital circuits based on CMOS technology. More specifically, the present invention relates to a method and apparatus for measuring frequency and high/low time of a digital signal for high speed digital circuits in a digital system, such as a data instrumentation system.
2. Background
In a number of digital applications, it is often necessary to determine whether the frequency of a digital signal is symmetric to another digital signal, i.e. same number of pulses, and whether the period of the digital signal is 50% duty cycle symmetric, i.e. high and low time are equal. A particular example is when digital clock skew is digitally compensated within a high speed digital circuit by reconstructing the digital clock, as the digital clock passes from one high speed digital circuit to another. More specifically, when the reconstructed digital clock is generated by a flip flop using the entering digital clock, a constant high enable and a clear signal.
Under this approach, the reconstructed digital clock is generated by clocking the constant high enable into the flip flop at the rising clock edge of a clock period. Concurrently, the constant high enable and its complement are clocked out of the flip flop. The complement output, after having been properly delayed, is used to assert an active low at the clear input of the flip flop for clearing its content as well as it outputs, which in turn causes the active low to be deasserted. As the process continues, the reconstructed digital clock is generated. However, if the active low is not deasserted before the rising clock edge of the next clock period, the reconstructed digital clock will have at most half of the frequency of the entering digital clock. Furthermore, the clock period of the reconstructed clock will not be 50% duty cycle symmetric. In one approach, a known calibration clock is used to calibrate the circuit and ensure the active low is asserted and deasserted at the right time.
Thus, it is desirable to be able to measure and determine the frequency of the reconstructed clock, and the high and low time of the reconstructed clock period. As will be disclosed, the present invention provides such a method and apparatus, which advantageously achieves the desirable results. As will be obvious from the descriptions to follow, the present invention has particular application to high speed data instrumentation systems.